JIT_OP_ICMP:
	[=reg, imm, imm] -> {
		if((jit_int)$2 < (jit_int)$3) x86_mov_reg_imm(inst, $1, -1);
		else if($2 == $3) x86_mov_reg_imm(inst, $1, 0);
		else x86_mov_reg_imm(inst, $1, 1);
	}
	[=reg, imm, local] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2);
			x86_set_reg(inst, X86_CC_NE, $1, 1);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LE, 0, 1);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GT, 0, 1);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 1);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, imm, reg] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_reg_imm(inst, X86_CMP, $3, $2);
			x86_set_reg(inst, X86_CC_NE, $1, 1);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LE, 0, 1);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_reg_imm(inst, X86_CMP, $3, $2);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GT, 0, 1);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 1);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, local, imm] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 1);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 1);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 1);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 1);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, local, reg] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 1);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 1);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 1);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 1);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, reg, imm] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_reg_imm(inst, X86_CMP, $2, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 1);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 1);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_reg_imm(inst, X86_CMP, $2, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 1);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 1);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, reg, local] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 1);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 1);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 1);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 1);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, reg, reg] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_reg_reg(inst, X86_CMP, $2, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 1);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 1);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_reg_reg(inst, X86_CMP, $2, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 1);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 1);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}

JIT_OP_ICMP_UN:
	[=reg, imm, imm] -> {
		if((jit_uint)$2 < (jit_uint)$3) x86_mov_reg_imm(inst, $1, -1);
		else if($2 == $3) x86_mov_reg_imm(inst, $1, 0);
		else x86_mov_reg_imm(inst, $1, 1);
	}
	[=reg, imm, local] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2);
			x86_set_reg(inst, X86_CC_NE, $1, 0);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LE, 0, 0);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GT, 0, 0);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 0);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, imm, reg] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_reg_imm(inst, X86_CMP, $3, $2);
			x86_set_reg(inst, X86_CC_NE, $1, 0);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LE, 0, 0);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_reg_imm(inst, X86_CMP, $3, $2);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GT, 0, 0);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 0);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, local, imm] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 0);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 0);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 0);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 0);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, local, reg] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 0);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 0);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 0);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 0);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, reg, imm] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_reg_imm(inst, X86_CMP, $2, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 0);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 0);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_reg_imm(inst, X86_CMP, $2, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 0);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 0);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, reg, local] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 1);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 0);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 0);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 0);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}
	[=reg, reg, reg] -> {
		unsigned char *patch1, *patch2;
		if($1 == X86_EAX || $1 == X86_EDX || $1 == X86_ECX || $1 == X86_EBX)
		{
			x86_alu_reg_reg(inst, X86_CMP, $2, $3);
			x86_set_reg(inst, X86_CC_NE, $1, 0);
			x86_widen_reg(inst, $1, $1, 0, 0);
			patch1 = inst;
			x86_branch8(inst, X86_CC_GE, 0, 0);
			x86_neg_reg(inst, $1);
			x86_patch(patch1, inst);
		}
		else
		{
			x86_alu_reg_reg(inst, X86_CMP, $2, $3);
			x86_mov_reg_imm(inst, $1, -1);
			patch1 = inst;
			x86_branch8(inst, X86_CC_LT, 0, 0);
			x86_mov_reg_imm(inst, $1, 0);
			patch2 = inst;
			x86_branch8(inst, X86_CC_EQ, 0, 0);
			x86_mov_reg_imm(inst, $1, 1);
			x86_patch(patch1, inst);
			x86_patch(patch2, inst);
		}
	}

JIT_OP_LCMP:
	[=reg, imm, imm] -> {
		jit_long value1 = ((jit_long *)($1))[0];
		jit_long value2 = ((jit_long *)($2))[0];
		if(value1 < value2) x86_mov_reg_imm(inst, $1, -1);
		else if(value1==value2) x86_mov_reg_imm(inst, $1, 0);
		else x86_mov_reg_imm(inst, $1, 1);
	}
	[=reg, imm, local] -> {
		unsigned char *patch1, *patch2;
		jit_uint value1 = ((jit_uint *)($2))[0];
		jit_int value2 = ((jit_int *)($2))[1];
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 1);
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 1);
		patch2 = inst;
		x86_branch8(inst, X86_CC_LE, 0, 1);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, imm, lreg] -> {
		unsigned char *patch1, *patch2;
		jit_uint value1 = ((jit_uint *)($2))[0];
		jit_int value2 = ((jit_int *)($2))[1];
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, %3, value2);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 1);
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 1);
		patch2 = inst;
		x86_branch8(inst, X86_CC_LE, 0, 1);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, local, imm] -> {
		unsigned char *patch1, *patch2;
		jit_uint value1 = ((jit_uint *)($3))[0];
		jit_int value2 = ((jit_int *)($3))[1];
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 1);
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 1);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 1);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, local, lreg] -> {
		unsigned char *patch1, *patch2;
		x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 1);
		x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 1);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 1);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, lreg, imm] -> {
		unsigned char *patch1, *patch2;
		jit_int value1 = ((jit_int *)($3))[0];
		jit_int value2 = ((jit_int *)($3))[1];
		x86_alu_reg_imm(inst, X86_CMP, %2, value2);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 1);
		x86_alu_reg_imm(inst, X86_CMP, $2, value1);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 1);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 1);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, lreg, local] -> {
		unsigned char *patch1, *patch2;
		x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 1);
		x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);	
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 1);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 1);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, lreg, lreg] -> {
		unsigned char *patch1, *patch2;
		x86_alu_reg_reg(inst, X86_CMP, %2, %3);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 1);
		x86_alu_reg_reg(inst, X86_CMP, $2, $3);	
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 1);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 1);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}

JIT_OP_LCMP_UN:
	[=reg, imm, imm] -> {
		jit_ulong value1 = ((jit_ulong *)($1))[0];
		jit_ulong value2 = ((jit_ulong *)($2))[0];
		if(value1 < value2) x86_mov_reg_imm(inst, $1, -1);
		else if(value1==value2) x86_mov_reg_imm(inst, $1, 0);
		else x86_mov_reg_imm(inst, $1, 1);
	}
	[=reg, imm, local] -> {
		unsigned char *patch1, *patch2;
		jit_uint value1 = ((jit_uint *)($2))[0];
		jit_uint value2 = ((jit_uint *)($2))[1];
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 0);
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 0);
		patch2 = inst;
		x86_branch8(inst, X86_CC_LE, 0, 0);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, imm, lreg] -> {
		unsigned char *patch1, *patch2;
		jit_uint value1 = ((jit_uint *)($2))[0];
		jit_uint value2 = ((jit_uint *)($2))[1];
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, %3, value2);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 0);
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 0);
		patch2 = inst;
		x86_branch8(inst, X86_CC_LE, 0, 0);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, local, imm] -> {
		unsigned char *patch1, *patch2;
		jit_uint value1 = ((jit_uint *)($3))[0];
		jit_uint value2 = ((jit_uint *)($3))[1];
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 0);
		x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 0);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 0);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, local, lreg] -> {
		unsigned char *patch1, *patch2;
		x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 0);
		x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3);	
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 0);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 0);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, lreg, imm] -> {
		unsigned char *patch1, *patch2;
		jit_uint value1 = ((jit_uint *)($3))[0];
		jit_uint value2 = ((jit_uint *)($3))[1];
		x86_alu_reg_imm(inst, X86_CMP, %2, value2);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 0);
		x86_alu_reg_imm(inst, X86_CMP, $2, value1);
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 0);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 0);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, lreg, local] -> {
		unsigned char *patch1, *patch2;
		x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 0);
		x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);	
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 0);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 0);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
	[=reg, lreg, lreg] -> {
		unsigned char *patch1, *patch2;
		x86_alu_reg_reg(inst, X86_CMP, %2, %3);
		patch1 = inst;
		x86_branch8(inst, X86_CC_NE, 0, 0);
		x86_alu_reg_reg(inst, X86_CMP, $2, $3);	
		x86_patch(patch1, inst);
		inst = setcc_reg(inst, $1, X86_CC_NE, 0);
		patch2 = inst;
		x86_branch8(inst, X86_CC_GE, 0, 0);
		x86_neg_reg(inst, $1);
		x86_patch(patch2, inst);
	}
